AC-DC converters convert power from an alternating current (AC) source to a direct current (DC) at a specified voltage level. AC-DC converters using secondary side control can deliver power more efficiently for a given size and weight, and are therefore widely used in portable electronic devices. Generally, an AC-DC converter transfers power from an AC input connected or coupled to a primary side of a transformer to a DC output coupled to a secondary side of the transformer.
A simplified schematic block diagram of one such AC-DC converter including a synchronous rectifier (SR) sense architecture is shown in FIG. 1. Referring to FIG. 1 the AC-DC converter 100, generally includes a rectifying circuit, such as a bridge rectifier 101, coupled to a transformer 102 rectify an AC input voltage, an active rectification element or power switch (PS), such as a PS field effect transistor (PS_FET 104) on a primary side of the transformer, a synchronous rectifier (SR), such as a SR field effect transistor (SR_FET 106) on a secondary side of the transformer, and an output filter or capacitor 108. In operation the PS_FET 104 switches power to the primary side on or off in response to a signal from a primary side controller 110. In secondary side controlled converters a secondary side controller 112 coupled to a drain node (SR_DRAIN 114) and gate of the SR_FET 106 senses voltage on the SR_DRAIN and turns the SR_FET on and off in response to sensed voltage peaks, and negative and zero-crossings.
In a AC-DC converter, the primary side controller 110 receives a signal from the SR_FET 106 or secondary side controller 112 over a feedback or flyback path 116. During the time in which the PS_FET 104 is on or closed with SR_FET 106 being off or open, the AC-DC converter 100 is said to be operating in fly-back mode, and a magnetic field builds up in the transformer 102 while a current on the primary side increases linearly. When the PS_FET 104 is off or opened, and SR_FET 106 is on or closed, the AC-DC converter 100 transfers the power to secondary side, in which the magnetic field begins to collapse and the secondary side current decreases steadily, but gradually as power is given to the Cout 108 connected to the output until a point is reached at which there is substantially zero current flow in the secondary.
One problem with previous generations of AC-DC converters using SR-SNS architecture is that depending on the turn-ratio (N:1) of the transformer 102 (typically 4:1), a voltage on the drain node 114 of the SR_FET 106 can go beyond the 1/Nth of rectified AC input voltage, often as high as 115V for 230V AC input. This in turn requires the use of a relatively large and expensive high-voltage FETs on SR_DRAIN node as well as additional electrostatic discharge (ESD) circuitry in the secondary side controller 112 to safely couple this voltage from the drain node 114 to the secondary side controller.
Prior approaches to at least partially addressing the above problem rely on use of a large, high power FET made with greater than 150V tolerant technology to sense SR_DRAIN node inside Secondary Controller 112 or use of external clamping circuits 118 to clip the input to the secondary side controller 112. These approaches have not been wholly satisfactory as the secondary side controller 112 is often realized as an integrated circuit (IC), and the use an external clamping circuit 118 to clip the input to the IC requires additional package pins and external components and connections for peak-detecting and feed-forward (feed-fwd) sensing because externally clipping the voltage on the SR_DRAIN 114 interferes with these detections. Thus, use of external clamping circuits 118 increases both the size and complexity of the IC and the number of package-pins of the IC dedicated to SR sensing. This in turn increases the bill of materials (BOM) needed for manufacturing the AC-DC converter 100 and the size of the IC on which the secondary side controller 112 is fabricated, both of which tend to increase cost while decreasing yield and utility of the AC-DC converter 100 in applications requiring compact power converters.
Another problem with previous generations of AC-DC converters 100, and secondary side controlled AC-DC converters in particular, arises due to requirement of detection of a valley or minimum voltage on the primary. In AC-DC converters 100 the PS_FET 104 should be turned on at the valley to minimize conduction loss and thereby achieve optimal efficiency. However, in secondary side controlled AC-DC converters 100, such as shown in FIG. 1, because the valley on the primary is detected as a peak on secondary side, which corresponds to a peak on secondary, detection of the peak needs to be done accurately. This additional requirement of peak detection results in additional components to be added on SR_DRAIN node, as the external clamping circuit 118 will not allow peaks on SR_DRAIN to be sensed accurately. Hence, additional component is required to be added on SR_DRAIN 114 for example Cpd is added in AC-DC converter 100, shown in FIG. 1 Thus, use of external peak-detect component (Cpd) increases both the size and complexity of the IC and the number of package-pins of the IC dedicated to SR sensing. This in turn increases the bill of materials (BOM) needed for manufacturing the AC-DC converter 100 and the size of the IC on which the secondary side controller 112 is fabricated, both of which tend to increase cost while decreasing yield and utility of the AC-DC converter 100 in applications requiring compact power converters. Consequently, with previous generations of AC-DC converters 100, it is not possible to hit the valley accurately resulting in loss of efficiency.
Accordingly, there is a need for an AC-DC converter with secondary side control and SR-SNS architecture and methods for operating the same that reduces cost and complexity without affecting performance. There is a further need for a AC-DC converter with secondary side control and SR-SNS architecture and methods for operating the same that provides accurate valley detection for improved efficiency.